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<title>Static Call Graph - [..\..\Output\Template.axf]</title></head>
<body><HR>
<H1>Static Call Graph for image ..\..\Output\Template.axf</H1><HR>
<BR><P>#&#060CALLGRAPH&#062# ARM Linker, 5060750: Last Updated: Tue Sep 23 09:10:01 2025
<BR><P>
<H3>Maximum Stack Usage =        120 bytes + Unknown(Cycles, Untraceable Function Pointers)</H3><H3>
Call chain for Maximum Stack Depth:</H3>
main &rArr; do_tcp_server &rArr; send &rArr; wiz_send_data &rArr; WIZCHIP_WRITE &rArr; IINCHIP_SpiSendData &rArr; SPI_SendByte
<P>
<H3>
Mutually Recursive functions
</H3> <LI><a href="#[1c]">ADC_IRQHandler</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[1c]">ADC_IRQHandler</a><BR>
 <LI><a href="#[4]">BusFault_Handler</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[4]">BusFault_Handler</a><BR>
 <LI><a href="#[2]">HardFault_Handler</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[2]">HardFault_Handler</a><BR>
 <LI><a href="#[3]">MemManage_Handler</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[3]">MemManage_Handler</a><BR>
 <LI><a href="#[5]">UsageFault_Handler</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[5]">UsageFault_Handler</a><BR>
</UL>
<P>
<H3>
Function Pointers
</H3><UL>
 <LI><a href="#[1c]">ADC_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[4]">BusFault_Handler</a> from stm32f4xx_it.o(i.BusFault_Handler) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[1e]">CAN1_RX0_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[1f]">CAN1_RX1_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[20]">CAN1_SCE_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[1d]">CAN1_TX_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[4a]">CAN2_RX0_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[4b]">CAN2_RX1_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[4c]">CAN2_SCE_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[49]">CAN2_TX_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[59]">CRYP_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[58]">DCMI_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[15]">DMA1_Stream0_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[16]">DMA1_Stream1_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[17]">DMA1_Stream2_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[18]">DMA1_Stream3_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[19]">DMA1_Stream4_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[1a]">DMA1_Stream5_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[1b]">DMA1_Stream6_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[39]">DMA1_Stream7_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[42]">DMA2_Stream0_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[43]">DMA2_Stream1_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[44]">DMA2_Stream2_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[45]">DMA2_Stream3_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[46]">DMA2_Stream4_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[4e]">DMA2_Stream5_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[4f]">DMA2_Stream6_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[50]">DMA2_Stream7_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[7]">DebugMon_Handler</a> from stm32f4xx_it.o(i.DebugMon_Handler) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[47]">ETH_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[48]">ETH_WKUP_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[10]">EXTI0_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[32]">EXTI15_10_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[11]">EXTI1_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[12]">EXTI2_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[13]">EXTI3_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[14]">EXTI4_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[21]">EXTI9_5_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[e]">FLASH_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[5b]">FPU_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[3a]">FSMC_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[5a]">HASH_RNG_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[2]">HardFault_Handler</a> from stm32f4xx_it.o(i.HardFault_Handler) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[2a]">I2C1_ER_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[29]">I2C1_EV_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[2c]">I2C2_ER_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[2b]">I2C2_EV_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[53]">I2C3_ER_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[52]">I2C3_EV_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[3]">MemManage_Handler</a> from stm32f4xx_it.o(i.MemManage_Handler) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[1]">NMI_Handler</a> from stm32f4xx_it.o(i.NMI_Handler) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[4d]">OTG_FS_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[34]">OTG_FS_WKUP_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[55]">OTG_HS_EP1_IN_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[54]">OTG_HS_EP1_OUT_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[57]">OTG_HS_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[56]">OTG_HS_WKUP_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[b]">PVD_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[8]">PendSV_Handler</a> from stm32f4xx_it.o(i.PendSV_Handler) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[f]">RCC_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[33]">RTC_Alarm_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[d]">RTC_WKUP_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[0]">Reset_Handler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[3b]">SDIO_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[2d]">SPI1_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[2e]">SPI2_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[3d]">SPI3_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[6]">SVC_Handler</a> from stm32f4xx_it.o(i.SVC_Handler) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[9]">SysTick_Handler</a> from stm32f4xx_it.o(i.SysTick_Handler) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[5d]">SystemInit</a> from system_stm32f4xx.o(i.SystemInit) referenced from startup_stm32f40xx.o(.text)
 <LI><a href="#[c]">TAMP_STAMP_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[22]">TIM1_BRK_TIM9_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[25]">TIM1_CC_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[24]">TIM1_TRG_COM_TIM11_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[23]">TIM1_UP_TIM10_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[26]">TIM2_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[27]">TIM3_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[28]">TIM4_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[3c]">TIM5_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[40]">TIM6_DAC_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[41]">TIM7_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[35]">TIM8_BRK_TIM12_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[38]">TIM8_CC_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[37]">TIM8_TRG_COM_TIM14_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[36]">TIM8_UP_TIM13_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[3e]">UART4_IRQHandler</a> from uart4.o(i.UART4_IRQHandler) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[3f]">UART5_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[2f]">USART1_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[30]">USART2_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[31]">USART3_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[51]">USART6_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[5]">UsageFault_Handler</a> from stm32f4xx_it.o(i.UsageFault_Handler) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[a]">WWDG_IRQHandler</a> from startup_stm32f40xx.o(.text) referenced from startup_stm32f40xx.o(RESET)
 <LI><a href="#[5e]">__main</a> from entry.o(.ARM.Collect$$$$00000000) referenced from startup_stm32f40xx.o(.text)
 <LI><a href="#[5f]">fputc</a> from bsp_usart_debug.o(i.fputc) referenced from printfa.o(i.__0printf)
 <LI><a href="#[5c]">main</a> from main.o(i.main) referenced from entry9a.o(.ARM.Collect$$$$0000000B)
 <LI><a href="#[60]">wizchip_cris_enter</a> from wizchip_conf.o(i.wizchip_cris_enter) referenced from wizchip_conf.o(.data)
 <LI><a href="#[61]">wizchip_cris_exit</a> from wizchip_conf.o(i.wizchip_cris_exit) referenced from wizchip_conf.o(.data)
 <LI><a href="#[63]">wizchip_cs_deselect</a> from wizchip_conf.o(i.wizchip_cs_deselect) referenced from wizchip_conf.o(.data)
 <LI><a href="#[62]">wizchip_cs_select</a> from wizchip_conf.o(i.wizchip_cs_select) referenced from wizchip_conf.o(.data)
 <LI><a href="#[64]">wizchip_spi_readbyte</a> from wizchip_conf.o(i.wizchip_spi_readbyte) referenced from wizchip_conf.o(.data)
 <LI><a href="#[65]">wizchip_spi_writebyte</a> from wizchip_conf.o(i.wizchip_spi_writebyte) referenced from wizchip_conf.o(.data)
</UL>
<P>
<H3>
Global Symbols
</H3>
<P><STRONG><a name="[5e]"></a>__main</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry.o(.ARM.Collect$$$$00000000))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(.text)
</UL>
<P><STRONG><a name="[c6]"></a>_main_stk</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry2.o(.ARM.Collect$$$$00000001))

<P><STRONG><a name="[66]"></a>_main_scatterload</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry5.o(.ARM.Collect$$$$00000004))
<BR><BR>[Calls]<UL><LI><a href="#[67]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__scatterload
</UL>

<P><STRONG><a name="[74]"></a>__main_after_scatterload</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry5.o(.ARM.Collect$$$$00000004))
<BR><BR>[Called By]<UL><LI><a href="#[67]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__scatterload
</UL>

<P><STRONG><a name="[c7]"></a>_main_clock</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry7b.o(.ARM.Collect$$$$00000008))

<P><STRONG><a name="[c8]"></a>_main_cpp_init</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry8b.o(.ARM.Collect$$$$0000000A))

<P><STRONG><a name="[c9]"></a>_main_init</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry9a.o(.ARM.Collect$$$$0000000B))

<P><STRONG><a name="[ca]"></a>__rt_final_cpp</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry10a.o(.ARM.Collect$$$$0000000D))

<P><STRONG><a name="[cb]"></a>__rt_final_exit</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry11a.o(.ARM.Collect$$$$0000000F))

<P><STRONG><a name="[0]"></a>Reset_Handler</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[1c]"></a>ADC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR><BR>[Calls]<UL><LI><a href="#[1c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_IRQHandler
</UL>
<BR>[Called By]<UL><LI><a href="#[1c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_IRQHandler
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[1e]"></a>CAN1_RX0_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[1f]"></a>CAN1_RX1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[20]"></a>CAN1_SCE_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[1d]"></a>CAN1_TX_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[4a]"></a>CAN2_RX0_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[4b]"></a>CAN2_RX1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[4c]"></a>CAN2_SCE_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[49]"></a>CAN2_TX_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[59]"></a>CRYP_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[58]"></a>DCMI_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[15]"></a>DMA1_Stream0_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[16]"></a>DMA1_Stream1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[17]"></a>DMA1_Stream2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[18]"></a>DMA1_Stream3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[19]"></a>DMA1_Stream4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[1a]"></a>DMA1_Stream5_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[1b]"></a>DMA1_Stream6_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[39]"></a>DMA1_Stream7_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[42]"></a>DMA2_Stream0_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[43]"></a>DMA2_Stream1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[44]"></a>DMA2_Stream2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[45]"></a>DMA2_Stream3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[46]"></a>DMA2_Stream4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[4e]"></a>DMA2_Stream5_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[4f]"></a>DMA2_Stream6_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[50]"></a>DMA2_Stream7_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[47]"></a>ETH_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[48]"></a>ETH_WKUP_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[10]"></a>EXTI0_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[32]"></a>EXTI15_10_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[11]"></a>EXTI1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[12]"></a>EXTI2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[13]"></a>EXTI3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[14]"></a>EXTI4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[21]"></a>EXTI9_5_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[e]"></a>FLASH_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[5b]"></a>FPU_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[3a]"></a>FSMC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[5a]"></a>HASH_RNG_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[2a]"></a>I2C1_ER_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[29]"></a>I2C1_EV_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[2c]"></a>I2C2_ER_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[2b]"></a>I2C2_EV_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[53]"></a>I2C3_ER_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[52]"></a>I2C3_EV_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[4d]"></a>OTG_FS_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[34]"></a>OTG_FS_WKUP_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[55]"></a>OTG_HS_EP1_IN_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[54]"></a>OTG_HS_EP1_OUT_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[57]"></a>OTG_HS_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[56]"></a>OTG_HS_WKUP_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[b]"></a>PVD_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[f]"></a>RCC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[33]"></a>RTC_Alarm_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[d]"></a>RTC_WKUP_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[3b]"></a>SDIO_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[2d]"></a>SPI1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[2e]"></a>SPI2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[3d]"></a>SPI3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[c]"></a>TAMP_STAMP_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[22]"></a>TIM1_BRK_TIM9_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[25]"></a>TIM1_CC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[24]"></a>TIM1_TRG_COM_TIM11_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[23]"></a>TIM1_UP_TIM10_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[26]"></a>TIM2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[27]"></a>TIM3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[28]"></a>TIM4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[3c]"></a>TIM5_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[40]"></a>TIM6_DAC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[41]"></a>TIM7_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[35]"></a>TIM8_BRK_TIM12_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[38]"></a>TIM8_CC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[37]"></a>TIM8_TRG_COM_TIM14_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[36]"></a>TIM8_UP_TIM13_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[3f]"></a>UART5_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[2f]"></a>USART1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[30]"></a>USART2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[31]"></a>USART3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[51]"></a>USART6_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[a]"></a>WWDG_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f40xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[c3]"></a>__aeabi_memcpy</STRONG> (Thumb, 36 bytes, Stack size 0 bytes, memcpya.o(.text))
<BR><BR>[Called By]<UL><LI><a href="#[b7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;set_w5500_ip
</UL>

<P><STRONG><a name="[cc]"></a>__aeabi_memcpy4</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, memcpya.o(.text), UNUSED)

<P><STRONG><a name="[cd]"></a>__aeabi_memcpy8</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, memcpya.o(.text), UNUSED)

<P><STRONG><a name="[ce]"></a>__aeabi_uidiv</STRONG> (Thumb, 0 bytes, Stack size 12 bytes, uidiv.o(.text), UNUSED)

<P><STRONG><a name="[96]"></a>__aeabi_uidivmod</STRONG> (Thumb, 44 bytes, Stack size 12 bytes, uidiv.o(.text), UNUSED)
<BR><BR>[Called By]<UL><LI><a href="#[91]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_printf_core
</UL>

<P><STRONG><a name="[68]"></a>__aeabi_uldivmod</STRONG> (Thumb, 98 bytes, Stack size 40 bytes, uldiv.o(.text), UNUSED)
<BR><BR>[Calls]<UL><LI><a href="#[69]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_llsr
<LI><a href="#[6a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_llsl
</UL>
<BR>[Called By]<UL><LI><a href="#[91]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_printf_core
<LI><a href="#[92]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_fp_digits
</UL>

<P><STRONG><a name="[cf]"></a>__I$use$fp</STRONG> (Thumb, 0 bytes, Stack size 48 bytes, iusefp.o(.text), UNUSED)

<P><STRONG><a name="[6b]"></a>__aeabi_dadd</STRONG> (Thumb, 322 bytes, Stack size 48 bytes, dadd.o(.text), UNUSED)
<BR><BR>[Calls]<UL><LI><a href="#[6c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_lasr
<LI><a href="#[6a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_llsl
<LI><a href="#[6e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_double_round
<LI><a href="#[6d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_double_epilogue
</UL>
<BR>[Called By]<UL><LI><a href="#[70]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_drsub
<LI><a href="#[6f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_dsub
<LI><a href="#[92]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_fp_digits
</UL>

<P><STRONG><a name="[6f]"></a>__aeabi_dsub</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, dadd.o(.text), UNUSED)
<BR><BR>[Calls]<UL><LI><a href="#[6b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_dadd
</UL>

<P><STRONG><a name="[70]"></a>__aeabi_drsub</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, dadd.o(.text), UNUSED)
<BR><BR>[Calls]<UL><LI><a href="#[6b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_dadd
</UL>

<P><STRONG><a name="[71]"></a>__aeabi_dmul</STRONG> (Thumb, 228 bytes, Stack size 48 bytes, dmul.o(.text), UNUSED)
<BR><BR>[Calls]<UL><LI><a href="#[6d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_double_epilogue
</UL>
<BR>[Called By]<UL><LI><a href="#[92]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_fp_digits
</UL>

<P><STRONG><a name="[72]"></a>__aeabi_ddiv</STRONG> (Thumb, 222 bytes, Stack size 32 bytes, ddiv.o(.text), UNUSED)
<BR><BR>[Calls]<UL><LI><a href="#[6e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_double_round
</UL>
<BR>[Called By]<UL><LI><a href="#[92]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_fp_digits
</UL>

<P><STRONG><a name="[73]"></a>__aeabi_d2ulz</STRONG> (Thumb, 48 bytes, Stack size 0 bytes, dfixul.o(.text), UNUSED)
<BR><BR>[Calls]<UL><LI><a href="#[69]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_llsr
<LI><a href="#[6a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_llsl
</UL>
<BR>[Called By]<UL><LI><a href="#[92]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_fp_digits
</UL>

<P><STRONG><a name="[93]"></a>__aeabi_cdrcmple</STRONG> (Thumb, 48 bytes, Stack size 0 bytes, cdrcmple.o(.text), UNUSED)
<BR><BR>[Called By]<UL><LI><a href="#[92]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_fp_digits
</UL>

<P><STRONG><a name="[67]"></a>__scatterload</STRONG> (Thumb, 28 bytes, Stack size 0 bytes, init.o(.text))
<BR><BR>[Calls]<UL><LI><a href="#[74]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__main_after_scatterload
</UL>
<BR>[Called By]<UL><LI><a href="#[66]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_main_scatterload
</UL>

<P><STRONG><a name="[d0]"></a>__scatterload_rt2</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, init.o(.text), UNUSED)

<P><STRONG><a name="[6a]"></a>__aeabi_llsl</STRONG> (Thumb, 30 bytes, Stack size 0 bytes, llshl.o(.text), UNUSED)
<BR><BR>[Called By]<UL><LI><a href="#[6d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_double_epilogue
<LI><a href="#[68]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_uldivmod
<LI><a href="#[6b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_dadd
<LI><a href="#[73]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_d2ulz
</UL>

<P><STRONG><a name="[d1]"></a>_ll_shift_l</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, llshl.o(.text), UNUSED)

<P><STRONG><a name="[69]"></a>__aeabi_llsr</STRONG> (Thumb, 32 bytes, Stack size 0 bytes, llushr.o(.text), UNUSED)
<BR><BR>[Called By]<UL><LI><a href="#[6d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_double_epilogue
<LI><a href="#[68]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_uldivmod
<LI><a href="#[73]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_d2ulz
</UL>

<P><STRONG><a name="[d2]"></a>_ll_ushift_r</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, llushr.o(.text), UNUSED)

<P><STRONG><a name="[6c]"></a>__aeabi_lasr</STRONG> (Thumb, 36 bytes, Stack size 0 bytes, llsshr.o(.text), UNUSED)
<BR><BR>[Called By]<UL><LI><a href="#[6b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_dadd
</UL>

<P><STRONG><a name="[d3]"></a>_ll_sshift_r</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, llsshr.o(.text), UNUSED)

<P><STRONG><a name="[6e]"></a>_double_round</STRONG> (Thumb, 30 bytes, Stack size 8 bytes, depilogue.o(.text), UNUSED)
<BR><BR>[Called By]<UL><LI><a href="#[6d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_double_epilogue
<LI><a href="#[72]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_ddiv
<LI><a href="#[6b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_dadd
</UL>

<P><STRONG><a name="[6d]"></a>_double_epilogue</STRONG> (Thumb, 156 bytes, Stack size 32 bytes, depilogue.o(.text), UNUSED)
<BR><BR>[Calls]<UL><LI><a href="#[69]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_llsr
<LI><a href="#[6a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_llsl
<LI><a href="#[6e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_double_round
</UL>
<BR>[Called By]<UL><LI><a href="#[71]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_dmul
<LI><a href="#[6b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_dadd
</UL>

<P><STRONG><a name="[4]"></a>BusFault_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32f4xx_it.o(i.BusFault_Handler))
<BR><BR>[Calls]<UL><LI><a href="#[4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;BusFault_Handler
</UL>
<BR>[Called By]<UL><LI><a href="#[4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;BusFault_Handler
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[7]"></a>DebugMon_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32f4xx_it.o(i.DebugMon_Handler))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[75]"></a>Debug_USART_Config</STRONG> (Thumb, 142 bytes, Stack size 40 bytes, bsp_usart_debug.o(i.Debug_USART_Config))
<BR><BR>[Stack]<UL><LI>Max Depth = 88<LI>Call Chain = Debug_USART_Config &rArr; USART_Init &rArr; RCC_GetClocksFreq
</UL>
<BR>[Calls]<UL><LI><a href="#[78]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GPIO_PinAFConfig
<LI><a href="#[79]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GPIO_Init
<LI><a href="#[77]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RCC_APB2PeriphClockCmd
<LI><a href="#[76]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RCC_AHB1PeriphClockCmd
<LI><a href="#[7a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_Init
<LI><a href="#[7b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_Cmd
</UL>
<BR>[Called By]<UL><LI><a href="#[5c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>

<P><STRONG><a name="[79]"></a>GPIO_Init</STRONG> (Thumb, 124 bytes, Stack size 24 bytes, stm32f4xx_gpio.o(i.GPIO_Init))
<BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = GPIO_Init
</UL>
<BR>[Called By]<UL><LI><a href="#[ae]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gpio_for_w5500_config
<LI><a href="#[83]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART4_Config
<LI><a href="#[75]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Debug_USART_Config
<LI><a href="#[b3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;led_init
</UL>

<P><STRONG><a name="[78]"></a>GPIO_PinAFConfig</STRONG> (Thumb, 32 bytes, Stack size 8 bytes, stm32f4xx_gpio.o(i.GPIO_PinAFConfig))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = GPIO_PinAFConfig
</UL>
<BR>[Called By]<UL><LI><a href="#[ae]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gpio_for_w5500_config
<LI><a href="#[83]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART4_Config
<LI><a href="#[75]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Debug_USART_Config
</UL>

<P><STRONG><a name="[bb]"></a>GPIO_ResetBits</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, stm32f4xx_gpio.o(i.GPIO_ResetBits))
<BR><BR>[Called By]<UL><LI><a href="#[b2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;wiz_cs
<LI><a href="#[b6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;reset_w5500
</UL>

<P><STRONG><a name="[af]"></a>GPIO_SetBits</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, stm32f4xx_gpio.o(i.GPIO_SetBits))
<BR><BR>[Called By]<UL><LI><a href="#[b2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;wiz_cs
<LI><a href="#[b6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;reset_w5500
<LI><a href="#[ae]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gpio_for_w5500_config
<LI><a href="#[5c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>

<P><STRONG><a name="[2]"></a>HardFault_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32f4xx_it.o(i.HardFault_Handler))
<BR><BR>[Calls]<UL><LI><a href="#[2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HardFault_Handler
</UL>
<BR>[Called By]<UL><LI><a href="#[2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HardFault_Handler
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[7c]"></a>IINCHIP_SpiSendData</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, wizchip_conf.o(i.IINCHIP_SpiSendData))
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = IINCHIP_SpiSendData &rArr; SPI_SendByte
</UL>
<BR>[Calls]<UL><LI><a href="#[7d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_SendByte
</UL>
<BR>[Called By]<UL><LI><a href="#[65]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;wizchip_spi_writebyte
<LI><a href="#[64]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;wizchip_spi_readbyte
<LI><a href="#[8f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;WIZCHIP_WRITE
<LI><a href="#[8c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;WIZCHIP_READ
</UL>

<P><STRONG><a name="[3]"></a>MemManage_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32f4xx_it.o(i.MemManage_Handler))
<BR><BR>[Calls]<UL><LI><a href="#[3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MemManage_Handler
</UL>
<BR>[Called By]<UL><LI><a href="#[3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MemManage_Handler
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[1]"></a>NMI_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32f4xx_it.o(i.NMI_Handler))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[85]"></a>NVIC_Init</STRONG> (Thumb, 98 bytes, Stack size 12 bytes, misc.o(i.NVIC_Init))
<BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = NVIC_Init
</UL>
<BR>[Called By]<UL><LI><a href="#[83]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART4_Config
</UL>

<P><STRONG><a name="[a3]"></a>PWR_BackupAccessCmd</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, stm32f4xx_pwr.o(i.PWR_BackupAccessCmd))
<BR><BR>[Called By]<UL><LI><a href="#[a2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;enable_backup_domain_access
</UL>

<P><STRONG><a name="[8]"></a>PendSV_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32f4xx_it.o(i.PendSV_Handler))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[76]"></a>RCC_AHB1PeriphClockCmd</STRONG> (Thumb, 22 bytes, Stack size 0 bytes, stm32f4xx_rcc.o(i.RCC_AHB1PeriphClockCmd))
<BR><BR>[Called By]<UL><LI><a href="#[ae]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gpio_for_w5500_config
<LI><a href="#[83]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART4_Config
<LI><a href="#[75]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Debug_USART_Config
<LI><a href="#[b3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;led_init
</UL>

<P><STRONG><a name="[84]"></a>RCC_APB1PeriphClockCmd</STRONG> (Thumb, 22 bytes, Stack size 0 bytes, stm32f4xx_rcc.o(i.RCC_APB1PeriphClockCmd))
<BR><BR>[Called By]<UL><LI><a href="#[a2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;enable_backup_domain_access
<LI><a href="#[83]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART4_Config
</UL>

<P><STRONG><a name="[77]"></a>RCC_APB2PeriphClockCmd</STRONG> (Thumb, 22 bytes, Stack size 0 bytes, stm32f4xx_rcc.o(i.RCC_APB2PeriphClockCmd))
<BR><BR>[Called By]<UL><LI><a href="#[ae]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gpio_for_w5500_config
<LI><a href="#[75]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Debug_USART_Config
</UL>

<P><STRONG><a name="[8b]"></a>RCC_GetClocksFreq</STRONG> (Thumb, 148 bytes, Stack size 16 bytes, stm32f4xx_rcc.o(i.RCC_GetClocksFreq))
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = RCC_GetClocksFreq
</UL>
<BR>[Called By]<UL><LI><a href="#[7a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_Init
</UL>

<P><STRONG><a name="[b9]"></a>RTC_ReadBackupRegister</STRONG> (Thumb, 16 bytes, Stack size 8 bytes, stm32f4xx_rtc.o(i.RTC_ReadBackupRegister))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = RTC_ReadBackupRegister
</UL>
<BR>[Called By]<UL><LI><a href="#[a8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;read_backup_register_std
</UL>

<P><STRONG><a name="[c5]"></a>RTC_WriteBackupRegister</STRONG> (Thumb, 16 bytes, Stack size 8 bytes, stm32f4xx_rtc.o(i.RTC_WriteBackupRegister))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = RTC_WriteBackupRegister
</UL>
<BR>[Called By]<UL><LI><a href="#[be]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;write_backup_register_std
</UL>

<P><STRONG><a name="[b1]"></a>SPI_Cmd</STRONG> (Thumb, 24 bytes, Stack size 0 bytes, stm32f4xx_spi.o(i.SPI_Cmd))
<BR><BR>[Called By]<UL><LI><a href="#[ae]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gpio_for_w5500_config
</UL>

<P><STRONG><a name="[7e]"></a>SPI_I2S_GetFlagStatus</STRONG> (Thumb, 14 bytes, Stack size 0 bytes, stm32f4xx_spi.o(i.SPI_I2S_GetFlagStatus))
<BR><BR>[Called By]<UL><LI><a href="#[7d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_SendByte
</UL>

<P><STRONG><a name="[81]"></a>SPI_I2S_ReceiveData</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, stm32f4xx_spi.o(i.SPI_I2S_ReceiveData))
<BR><BR>[Called By]<UL><LI><a href="#[7d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_SendByte
</UL>

<P><STRONG><a name="[7f]"></a>SPI_I2S_SendData</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, stm32f4xx_spi.o(i.SPI_I2S_SendData))
<BR><BR>[Called By]<UL><LI><a href="#[7d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_SendByte
</UL>

<P><STRONG><a name="[b0]"></a>SPI_Init</STRONG> (Thumb, 56 bytes, Stack size 12 bytes, stm32f4xx_spi.o(i.SPI_Init))
<BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = SPI_Init
</UL>
<BR>[Called By]<UL><LI><a href="#[ae]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gpio_for_w5500_config
</UL>

<P><STRONG><a name="[7d]"></a>SPI_SendByte</STRONG> (Thumb, 54 bytes, Stack size 16 bytes, wizchip_conf.o(i.SPI_SendByte))
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = SPI_SendByte
</UL>
<BR>[Calls]<UL><LI><a href="#[7f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_I2S_SendData
<LI><a href="#[81]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_I2S_ReceiveData
<LI><a href="#[7e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_I2S_GetFlagStatus
<LI><a href="#[80]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;delay_us
</UL>
<BR>[Called By]<UL><LI><a href="#[7c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IINCHIP_SpiSendData
</UL>

<P><STRONG><a name="[6]"></a>SVC_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32f4xx_it.o(i.SVC_Handler))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[99]"></a>SysTick_CLKSourceConfig</STRONG> (Thumb, 28 bytes, Stack size 0 bytes, misc.o(i.SysTick_CLKSourceConfig))
<BR><BR>[Called By]<UL><LI><a href="#[98]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;delay_init
</UL>

<P><STRONG><a name="[9]"></a>SysTick_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32f4xx_it.o(i.SysTick_Handler))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[5d]"></a>SystemInit</STRONG> (Thumb, 74 bytes, Stack size 8 bytes, system_stm32f4xx.o(i.SystemInit))
<BR><BR>[Stack]<UL><LI>Max Depth = 20<LI>Call Chain = SystemInit &rArr; SetSysClock
</UL>
<BR>[Calls]<UL><LI><a href="#[82]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SetSysClock
</UL>
<BR>[Called By]<UL><LI><a href="#[5c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(.text)
</UL>
<P><STRONG><a name="[83]"></a>UART4_Config</STRONG> (Thumb, 174 bytes, Stack size 48 bytes, uart4.o(i.UART4_Config))
<BR><BR>[Stack]<UL><LI>Max Depth = 96<LI>Call Chain = UART4_Config &rArr; USART_Init &rArr; RCC_GetClocksFreq
</UL>
<BR>[Calls]<UL><LI><a href="#[85]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NVIC_Init
<LI><a href="#[78]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GPIO_PinAFConfig
<LI><a href="#[79]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GPIO_Init
<LI><a href="#[84]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RCC_APB1PeriphClockCmd
<LI><a href="#[76]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RCC_AHB1PeriphClockCmd
<LI><a href="#[7a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_Init
<LI><a href="#[86]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_ITConfig
<LI><a href="#[7b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_Cmd
</UL>
<BR>[Called By]<UL><LI><a href="#[5c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>

<P><STRONG><a name="[3e]"></a>UART4_IRQHandler</STRONG> (Thumb, 78 bytes, Stack size 16 bytes, uart4.o(i.UART4_IRQHandler))
<BR><BR>[Stack]<UL><LI>Max Depth = 40<LI>Call Chain = UART4_IRQHandler &rArr; __2printf
</UL>
<BR>[Calls]<UL><LI><a href="#[89]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_ReceiveData
<LI><a href="#[87]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_GetITStatus
<LI><a href="#[88]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_ClearITPendingBit
<LI><a href="#[8a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__2printf
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[88]"></a>USART_ClearITPendingBit</STRONG> (Thumb, 16 bytes, Stack size 0 bytes, stm32f4xx_usart.o(i.USART_ClearITPendingBit))
<BR><BR>[Called By]<UL><LI><a href="#[3e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART4_IRQHandler
</UL>

<P><STRONG><a name="[7b]"></a>USART_Cmd</STRONG> (Thumb, 24 bytes, Stack size 0 bytes, stm32f4xx_usart.o(i.USART_Cmd))
<BR><BR>[Called By]<UL><LI><a href="#[83]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART4_Config
<LI><a href="#[75]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Debug_USART_Config
</UL>

<P><STRONG><a name="[a5]"></a>USART_GetFlagStatus</STRONG> (Thumb, 14 bytes, Stack size 0 bytes, stm32f4xx_usart.o(i.USART_GetFlagStatus))
<BR><BR>[Called By]<UL><LI><a href="#[5f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;fputc
</UL>

<P><STRONG><a name="[87]"></a>USART_GetITStatus</STRONG> (Thumb, 64 bytes, Stack size 16 bytes, stm32f4xx_usart.o(i.USART_GetITStatus))
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = USART_GetITStatus
</UL>
<BR>[Called By]<UL><LI><a href="#[3e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART4_IRQHandler
</UL>

<P><STRONG><a name="[86]"></a>USART_ITConfig</STRONG> (Thumb, 54 bytes, Stack size 8 bytes, stm32f4xx_usart.o(i.USART_ITConfig))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = USART_ITConfig
</UL>
<BR>[Called By]<UL><LI><a href="#[83]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART4_Config
</UL>

<P><STRONG><a name="[7a]"></a>USART_Init</STRONG> (Thumb, 180 bytes, Stack size 32 bytes, stm32f4xx_usart.o(i.USART_Init))
<BR><BR>[Stack]<UL><LI>Max Depth = 48<LI>Call Chain = USART_Init &rArr; RCC_GetClocksFreq
</UL>
<BR>[Calls]<UL><LI><a href="#[8b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RCC_GetClocksFreq
</UL>
<BR>[Called By]<UL><LI><a href="#[83]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART4_Config
<LI><a href="#[75]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Debug_USART_Config
</UL>

<P><STRONG><a name="[89]"></a>USART_ReceiveData</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, stm32f4xx_usart.o(i.USART_ReceiveData))
<BR><BR>[Called By]<UL><LI><a href="#[3e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART4_IRQHandler
</UL>

<P><STRONG><a name="[a4]"></a>USART_SendData</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, stm32f4xx_usart.o(i.USART_SendData))
<BR><BR>[Called By]<UL><LI><a href="#[5f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;fputc
</UL>

<P><STRONG><a name="[5]"></a>UsageFault_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32f4xx_it.o(i.UsageFault_Handler))
<BR><BR>[Calls]<UL><LI><a href="#[5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UsageFault_Handler
</UL>
<BR>[Called By]<UL><LI><a href="#[5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UsageFault_Handler
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f40xx.o(RESET)
</UL>
<P><STRONG><a name="[8c]"></a>WIZCHIP_READ</STRONG> (Thumb, 48 bytes, Stack size 8 bytes, wizchip_conf.o(i.WIZCHIP_READ))
<BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = WIZCHIP_READ &rArr; IINCHIP_SpiSendData &rArr; SPI_SendByte
</UL>
<BR>[Calls]<UL><LI><a href="#[8e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;iinchip_cson
<LI><a href="#[8d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;iinchip_csoff
<LI><a href="#[7c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IINCHIP_SpiSendData
</UL>
<BR>[Called By]<UL><LI><a href="#[bc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;wiz_send_data
<LI><a href="#[ba]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;wiz_recv_data
<LI><a href="#[a6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;getSn_TX_FSR
<LI><a href="#[9f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;getSn_RX_RSR
<LI><a href="#[9d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;socket
<LI><a href="#[a1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;send
<LI><a href="#[a0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;recv
<LI><a href="#[9e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;listen
<LI><a href="#[97]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;close
<LI><a href="#[9c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;do_tcp_server
</UL>

<P><STRONG><a name="[c4]"></a>WIZCHIP_READ_BUF</STRONG> (Thumb, 74 bytes, Stack size 24 bytes, w5500.o(i.WIZCHIP_READ_BUF))
<BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = WIZCHIP_READ_BUF
</UL>
<BR>[Called By]<UL><LI><a href="#[ba]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;wiz_recv_data
<LI><a href="#[b7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;set_w5500_ip
</UL>

<P><STRONG><a name="[8f]"></a>WIZCHIP_WRITE</STRONG> (Thumb, 52 bytes, Stack size 16 bytes, wizchip_conf.o(i.WIZCHIP_WRITE))
<BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = WIZCHIP_WRITE &rArr; IINCHIP_SpiSendData &rArr; SPI_SendByte
</UL>
<BR>[Calls]<UL><LI><a href="#[8e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;iinchip_cson
<LI><a href="#[8d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;iinchip_csoff
<LI><a href="#[7c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IINCHIP_SpiSendData
</UL>
<BR>[Called By]<UL><LI><a href="#[bc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;wiz_send_data
<LI><a href="#[ba]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;wiz_recv_data
<LI><a href="#[9d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;socket
<LI><a href="#[a1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;send
<LI><a href="#[a0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;recv
<LI><a href="#[9e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;listen
<LI><a href="#[97]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;close
<LI><a href="#[b8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;socket_buf_init
<LI><a href="#[b6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;reset_w5500
<LI><a href="#[9c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;do_tcp_server
</UL>

<P><STRONG><a name="[b5]"></a>WIZCHIP_WRITE_BUF</STRONG> (Thumb, 76 bytes, Stack size 24 bytes, w5500.o(i.WIZCHIP_WRITE_BUF))
<BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = WIZCHIP_WRITE_BUF
</UL>
<BR>[Called By]<UL><LI><a href="#[bc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;wiz_send_data
<LI><a href="#[b7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;set_w5500_ip
<LI><a href="#[b4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mac_set
</UL>

<P><STRONG><a name="[90]"></a>__0printf</STRONG> (Thumb, 22 bytes, Stack size 24 bytes, printfa.o(i.__0printf), UNUSED)
<BR><BR>[Calls]<UL><LI><a href="#[91]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_printf_core
</UL>

<P><STRONG><a name="[d4]"></a>__1printf</STRONG> (Thumb, 0 bytes, Stack size 24 bytes, printfa.o(i.__0printf), UNUSED)

<P><STRONG><a name="[8a]"></a>__2printf</STRONG> (Thumb, 0 bytes, Stack size 24 bytes, printfa.o(i.__0printf))
<BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = __2printf
</UL>
<BR>[Called By]<UL><LI><a href="#[b7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;set_w5500_ip
<LI><a href="#[b6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;reset_w5500
<LI><a href="#[ae]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gpio_for_w5500_config
<LI><a href="#[9c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;do_tcp_server
<LI><a href="#[3e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART4_IRQHandler
</UL>

<P><STRONG><a name="[d5]"></a>__c89printf</STRONG> (Thumb, 0 bytes, Stack size 24 bytes, printfa.o(i.__0printf), UNUSED)

<P><STRONG><a name="[d6]"></a>printf</STRONG> (Thumb, 0 bytes, Stack size 24 bytes, printfa.o(i.__0printf), UNUSED)

<P><STRONG><a name="[d7]"></a>__scatterload_copy</STRONG> (Thumb, 14 bytes, Stack size unknown bytes, handlers.o(i.__scatterload_copy), UNUSED)

<P><STRONG><a name="[d8]"></a>__scatterload_null</STRONG> (Thumb, 2 bytes, Stack size unknown bytes, handlers.o(i.__scatterload_null), UNUSED)

<P><STRONG><a name="[d9]"></a>__scatterload_zeroinit</STRONG> (Thumb, 14 bytes, Stack size unknown bytes, handlers.o(i.__scatterload_zeroinit), UNUSED)

<P><STRONG><a name="[97]"></a>close</STRONG> (Thumb, 108 bytes, Stack size 24 bytes, socket.o(i.close))
<BR><BR>[Stack]<UL><LI>Max Depth = 56<LI>Call Chain = close &rArr; WIZCHIP_WRITE &rArr; IINCHIP_SpiSendData &rArr; SPI_SendByte
</UL>
<BR>[Calls]<UL><LI><a href="#[8f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;WIZCHIP_WRITE
<LI><a href="#[8c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;WIZCHIP_READ
</UL>
<BR>[Called By]<UL><LI><a href="#[9d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;socket
<LI><a href="#[a1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;send
<LI><a href="#[a0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;recv
<LI><a href="#[9e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;listen
<LI><a href="#[9c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;do_tcp_server
</UL>

<P><STRONG><a name="[98]"></a>delay_init</STRONG> (Thumb, 38 bytes, Stack size 8 bytes, delay.o(i.delay_init))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = delay_init
</UL>
<BR>[Calls]<UL><LI><a href="#[99]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SysTick_CLKSourceConfig
</UL>
<BR>[Called By]<UL><LI><a href="#[5c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>

<P><STRONG><a name="[9a]"></a>delay_ms</STRONG> (Thumb, 52 bytes, Stack size 16 bytes, delay.o(i.delay_ms))
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = delay_ms
</UL>
<BR>[Calls]<UL><LI><a href="#[9b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;delay_xms
</UL>
<BR>[Called By]<UL><LI><a href="#[b7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;set_w5500_ip
<LI><a href="#[b6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;reset_w5500
<LI><a href="#[5c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>

<P><STRONG><a name="[80]"></a>delay_us</STRONG> (Thumb, 46 bytes, Stack size 0 bytes, delay.o(i.delay_us))
<BR><BR>[Called By]<UL><LI><a href="#[b2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;wiz_cs
<LI><a href="#[7d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_SendByte
</UL>

<P><STRONG><a name="[9b]"></a>delay_xms</STRONG> (Thumb, 46 bytes, Stack size 0 bytes, delay.o(i.delay_xms))
<BR><BR>[Called By]<UL><LI><a href="#[9a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;delay_ms
</UL>

<P><STRONG><a name="[9c]"></a>do_tcp_server</STRONG> (Thumb, 134 bytes, Stack size 8 bytes, tcp.o(i.do_tcp_server))
<BR><BR>[Stack]<UL><LI>Max Depth = 120<LI>Call Chain = do_tcp_server &rArr; send &rArr; wiz_send_data &rArr; WIZCHIP_WRITE &rArr; IINCHIP_SpiSendData &rArr; SPI_SendByte
</UL>
<BR>[Calls]<UL><LI><a href="#[9f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;getSn_RX_RSR
<LI><a href="#[9d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;socket
<LI><a href="#[a1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;send
<LI><a href="#[a0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;recv
<LI><a href="#[9e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;listen
<LI><a href="#[97]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;close
<LI><a href="#[8f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;WIZCHIP_WRITE
<LI><a href="#[8c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;WIZCHIP_READ
<LI><a href="#[8a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__2printf
</UL>
<BR>[Called By]<UL><LI><a href="#[5c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>

<P><STRONG><a name="[5f]"></a>fputc</STRONG> (Thumb, 30 bytes, Stack size 16 bytes, bsp_usart_debug.o(i.fputc))
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = fputc
</UL>
<BR>[Calls]<UL><LI><a href="#[a4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_SendData
<LI><a href="#[a5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_GetFlagStatus
</UL>
<BR>[Address Reference Count : 1]<UL><LI> printfa.o(i.__0printf)
</UL>
<P><STRONG><a name="[9f]"></a>getSn_RX_RSR</STRONG> (Thumb, 80 bytes, Stack size 24 bytes, w5500.o(i.getSn_RX_RSR))
<BR><BR>[Stack]<UL><LI>Max Depth = 48<LI>Call Chain = getSn_RX_RSR &rArr; WIZCHIP_READ &rArr; IINCHIP_SpiSendData &rArr; SPI_SendByte
</UL>
<BR>[Calls]<UL><LI><a href="#[8c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;WIZCHIP_READ
</UL>
<BR>[Called By]<UL><LI><a href="#[a0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;recv
<LI><a href="#[9c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;do_tcp_server
</UL>

<P><STRONG><a name="[a6]"></a>getSn_TX_FSR</STRONG> (Thumb, 78 bytes, Stack size 24 bytes, w5500.o(i.getSn_TX_FSR))
<BR><BR>[Stack]<UL><LI>Max Depth = 48<LI>Call Chain = getSn_TX_FSR &rArr; WIZCHIP_READ &rArr; IINCHIP_SpiSendData &rArr; SPI_SendByte
</UL>
<BR>[Calls]<UL><LI><a href="#[8c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;WIZCHIP_READ
</UL>
<BR>[Called By]<UL><LI><a href="#[a1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;send
<LI><a href="#[a0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;recv
</UL>

<P><STRONG><a name="[a7]"></a>get_bkp_dns</STRONG> (Thumb, 24 bytes, Stack size 8 bytes, bkp.o(i.get_bkp_dns))
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = get_bkp_dns &rArr; read_backup_register_std &rArr; RTC_ReadBackupRegister
</UL>
<BR>[Calls]<UL><LI><a href="#[a8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;read_backup_register_std
</UL>
<BR>[Called By]<UL><LI><a href="#[b7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;set_w5500_ip
</UL>

<P><STRONG><a name="[a9]"></a>get_bkp_gw</STRONG> (Thumb, 24 bytes, Stack size 8 bytes, bkp.o(i.get_bkp_gw))
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = get_bkp_gw &rArr; read_backup_register_std &rArr; RTC_ReadBackupRegister
</UL>
<BR>[Calls]<UL><LI><a href="#[a8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;read_backup_register_std
</UL>
<BR>[Called By]<UL><LI><a href="#[b7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;set_w5500_ip
</UL>

<P><STRONG><a name="[aa]"></a>get_bkp_ip</STRONG> (Thumb, 26 bytes, Stack size 8 bytes, bkp.o(i.get_bkp_ip))
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = get_bkp_ip &rArr; read_backup_register_std &rArr; RTC_ReadBackupRegister
</UL>
<BR>[Calls]<UL><LI><a href="#[a8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;read_backup_register_std
</UL>
<BR>[Called By]<UL><LI><a href="#[b7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;set_w5500_ip
</UL>

<P><STRONG><a name="[ab]"></a>get_bkp_mac</STRONG> (Thumb, 40 bytes, Stack size 16 bytes, bkp.o(i.get_bkp_mac))
<BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = get_bkp_mac &rArr; read_backup_register_std &rArr; RTC_ReadBackupRegister
</UL>
<BR>[Calls]<UL><LI><a href="#[a8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;read_backup_register_std
</UL>
<BR>[Called By]<UL><LI><a href="#[b7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;set_w5500_ip
</UL>

<P><STRONG><a name="[ac]"></a>get_bkp_mask</STRONG> (Thumb, 24 bytes, Stack size 8 bytes, bkp.o(i.get_bkp_mask))
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = get_bkp_mask &rArr; read_backup_register_std &rArr; RTC_ReadBackupRegister
</UL>
<BR>[Calls]<UL><LI><a href="#[a8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;read_backup_register_std
</UL>
<BR>[Called By]<UL><LI><a href="#[b7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;set_w5500_ip
</UL>

<P><STRONG><a name="[ad]"></a>get_bkp_stat</STRONG> (Thumb, 80 bytes, Stack size 16 bytes, bkp.o(i.get_bkp_stat))
<BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = get_bkp_stat &rArr; read_backup_register_std &rArr; RTC_ReadBackupRegister
</UL>
<BR>[Calls]<UL><LI><a href="#[a8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;read_backup_register_std
</UL>
<BR>[Called By]<UL><LI><a href="#[b7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;set_w5500_ip
</UL>

<P><STRONG><a name="[ae]"></a>gpio_for_w5500_config</STRONG> (Thumb, 290 bytes, Stack size 48 bytes, wizchip_conf.o(i.gpio_for_w5500_config))
<BR><BR>[Stack]<UL><LI>Max Depth = 72<LI>Call Chain = gpio_for_w5500_config &rArr; GPIO_Init
</UL>
<BR>[Calls]<UL><LI><a href="#[af]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GPIO_SetBits
<LI><a href="#[78]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GPIO_PinAFConfig
<LI><a href="#[79]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GPIO_Init
<LI><a href="#[77]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RCC_APB2PeriphClockCmd
<LI><a href="#[76]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RCC_AHB1PeriphClockCmd
<LI><a href="#[b0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_Init
<LI><a href="#[b1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_Cmd
<LI><a href="#[8a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__2printf
</UL>
<BR>[Called By]<UL><LI><a href="#[5c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>

<P><STRONG><a name="[8d]"></a>iinchip_csoff</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, wizchip_conf.o(i.iinchip_csoff))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = iinchip_csoff &rArr; wiz_cs
</UL>
<BR>[Calls]<UL><LI><a href="#[b2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;wiz_cs
</UL>
<BR>[Called By]<UL><LI><a href="#[62]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;wizchip_cs_select
<LI><a href="#[8f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;WIZCHIP_WRITE
<LI><a href="#[8c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;WIZCHIP_READ
</UL>

<P><STRONG><a name="[8e]"></a>iinchip_cson</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, wizchip_conf.o(i.iinchip_cson))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = iinchip_cson &rArr; wiz_cs
</UL>
<BR>[Calls]<UL><LI><a href="#[b2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;wiz_cs
</UL>
<BR>[Called By]<UL><LI><a href="#[63]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;wizchip_cs_deselect
<LI><a href="#[8f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;WIZCHIP_WRITE
<LI><a href="#[8c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;WIZCHIP_READ
</UL>

<P><STRONG><a name="[b3]"></a>led_init</STRONG> (Thumb, 46 bytes, Stack size 16 bytes, main.o(i.led_init))
<BR><BR>[Stack]<UL><LI>Max Depth = 40<LI>Call Chain = led_init &rArr; GPIO_Init
</UL>
<BR>[Calls]<UL><LI><a href="#[79]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GPIO_Init
<LI><a href="#[76]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RCC_AHB1PeriphClockCmd
</UL>
<BR>[Called By]<UL><LI><a href="#[5c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>

<P><STRONG><a name="[9e]"></a>listen</STRONG> (Thumb, 126 bytes, Stack size 16 bytes, socket.o(i.listen))
<BR><BR>[Stack]<UL><LI>Max Depth = 72<LI>Call Chain = listen &rArr; close &rArr; WIZCHIP_WRITE &rArr; IINCHIP_SpiSendData &rArr; SPI_SendByte
</UL>
<BR>[Calls]<UL><LI><a href="#[97]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;close
<LI><a href="#[8f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;WIZCHIP_WRITE
<LI><a href="#[8c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;WIZCHIP_READ
</UL>
<BR>[Called By]<UL><LI><a href="#[9c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;do_tcp_server
</UL>

<P><STRONG><a name="[b4]"></a>mac_set</STRONG> (Thumb, 38 bytes, Stack size 8 bytes, wizchip_conf.o(i.mac_set))
<BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = mac_set &rArr; WIZCHIP_WRITE_BUF
</UL>
<BR>[Calls]<UL><LI><a href="#[b5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;WIZCHIP_WRITE_BUF
</UL>
<BR>[Called By]<UL><LI><a href="#[5c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>

<P><STRONG><a name="[5c]"></a>main</STRONG> (Thumb, 72 bytes, Stack size 0 bytes, main.o(i.main))
<BR><BR>[Stack]<UL><LI>Max Depth = 120<LI>Call Chain = main &rArr; do_tcp_server &rArr; send &rArr; wiz_send_data &rArr; WIZCHIP_WRITE &rArr; IINCHIP_SpiSendData &rArr; SPI_SendByte
</UL>
<BR>[Calls]<UL><LI><a href="#[5d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SystemInit
<LI><a href="#[af]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GPIO_SetBits
<LI><a href="#[b8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;socket_buf_init
<LI><a href="#[b7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;set_w5500_ip
<LI><a href="#[b6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;reset_w5500
<LI><a href="#[b4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mac_set
<LI><a href="#[ae]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gpio_for_w5500_config
<LI><a href="#[9c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;do_tcp_server
<LI><a href="#[9a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;delay_ms
<LI><a href="#[98]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;delay_init
<LI><a href="#[83]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART4_Config
<LI><a href="#[75]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Debug_USART_Config
<LI><a href="#[b3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;led_init
</UL>
<BR>[Address Reference Count : 1]<UL><LI> entry9a.o(.ARM.Collect$$$$0000000B)
</UL>
<P><STRONG><a name="[a8]"></a>read_backup_register_std</STRONG> (Thumb, 152 bytes, Stack size 0 bytes, bkp.o(i.read_backup_register_std))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = read_backup_register_std &rArr; RTC_ReadBackupRegister
</UL>
<BR>[Calls]<UL><LI><a href="#[b9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RTC_ReadBackupRegister
</UL>
<BR>[Called By]<UL><LI><a href="#[ad]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;get_bkp_stat
<LI><a href="#[ac]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;get_bkp_mask
<LI><a href="#[ab]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;get_bkp_mac
<LI><a href="#[aa]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;get_bkp_ip
<LI><a href="#[a9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;get_bkp_gw
<LI><a href="#[a7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;get_bkp_dns
</UL>

<P><STRONG><a name="[a0]"></a>recv</STRONG> (Thumb, 234 bytes, Stack size 48 bytes, socket.o(i.recv))
<BR><BR>[Stack]<UL><LI>Max Depth = 112<LI>Call Chain = recv &rArr; wiz_recv_data &rArr; WIZCHIP_WRITE &rArr; IINCHIP_SpiSendData &rArr; SPI_SendByte
</UL>
<BR>[Calls]<UL><LI><a href="#[ba]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;wiz_recv_data
<LI><a href="#[a6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;getSn_TX_FSR
<LI><a href="#[9f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;getSn_RX_RSR
<LI><a href="#[97]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;close
<LI><a href="#[8f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;WIZCHIP_WRITE
<LI><a href="#[8c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;WIZCHIP_READ
</UL>
<BR>[Called By]<UL><LI><a href="#[9c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;do_tcp_server
</UL>

<P><STRONG><a name="[b6]"></a>reset_w5500</STRONG> (Thumb, 76 bytes, Stack size 8 bytes, wizchip_conf.o(i.reset_w5500))
<BR><BR>[Stack]<UL><LI>Max Depth = 40<LI>Call Chain = reset_w5500 &rArr; WIZCHIP_WRITE &rArr; IINCHIP_SpiSendData &rArr; SPI_SendByte
</UL>
<BR>[Calls]<UL><LI><a href="#[af]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GPIO_SetBits
<LI><a href="#[bb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GPIO_ResetBits
<LI><a href="#[8f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;WIZCHIP_WRITE
<LI><a href="#[9a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;delay_ms
<LI><a href="#[8a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__2printf
</UL>
<BR>[Called By]<UL><LI><a href="#[5c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>

<P><STRONG><a name="[a1]"></a>send</STRONG> (Thumb, 292 bytes, Stack size 48 bytes, socket.o(i.send))
<BR><BR>[Stack]<UL><LI>Max Depth = 112<LI>Call Chain = send &rArr; wiz_send_data &rArr; WIZCHIP_WRITE &rArr; IINCHIP_SpiSendData &rArr; SPI_SendByte
</UL>
<BR>[Calls]<UL><LI><a href="#[bc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;wiz_send_data
<LI><a href="#[a6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;getSn_TX_FSR
<LI><a href="#[97]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;close
<LI><a href="#[8f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;WIZCHIP_WRITE
<LI><a href="#[8c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;WIZCHIP_READ
</UL>
<BR>[Called By]<UL><LI><a href="#[9c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;do_tcp_server
</UL>

<P><STRONG><a name="[bd]"></a>set_bkp_dns</STRONG> (Thumb, 38 bytes, Stack size 16 bytes, bkp.o(i.set_bkp_dns))
<BR><BR>[Stack]<UL><LI>Max Depth = 40<LI>Call Chain = set_bkp_dns &rArr; write_backup_register_std &rArr; RTC_WriteBackupRegister
</UL>
<BR>[Calls]<UL><LI><a href="#[be]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;write_backup_register_std
</UL>
<BR>[Called By]<UL><LI><a href="#[b7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;set_w5500_ip
</UL>

<P><STRONG><a name="[bf]"></a>set_bkp_gw</STRONG> (Thumb, 38 bytes, Stack size 16 bytes, bkp.o(i.set_bkp_gw))
<BR><BR>[Stack]<UL><LI>Max Depth = 40<LI>Call Chain = set_bkp_gw &rArr; write_backup_register_std &rArr; RTC_WriteBackupRegister
</UL>
<BR>[Calls]<UL><LI><a href="#[be]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;write_backup_register_std
</UL>
<BR>[Called By]<UL><LI><a href="#[b7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;set_w5500_ip
</UL>

<P><STRONG><a name="[c0]"></a>set_bkp_ip</STRONG> (Thumb, 38 bytes, Stack size 16 bytes, bkp.o(i.set_bkp_ip))
<BR><BR>[Stack]<UL><LI>Max Depth = 40<LI>Call Chain = set_bkp_ip &rArr; write_backup_register_std &rArr; RTC_WriteBackupRegister
</UL>
<BR>[Calls]<UL><LI><a href="#[be]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;write_backup_register_std
</UL>
<BR>[Called By]<UL><LI><a href="#[b7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;set_w5500_ip
</UL>

<P><STRONG><a name="[c1]"></a>set_bkp_mac</STRONG> (Thumb, 62 bytes, Stack size 24 bytes, bkp.o(i.set_bkp_mac))
<BR><BR>[Stack]<UL><LI>Max Depth = 48<LI>Call Chain = set_bkp_mac &rArr; write_backup_register_std &rArr; RTC_WriteBackupRegister
</UL>
<BR>[Calls]<UL><LI><a href="#[be]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;write_backup_register_std
</UL>
<BR>[Called By]<UL><LI><a href="#[b7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;set_w5500_ip
</UL>

<P><STRONG><a name="[c2]"></a>set_bkp_mask</STRONG> (Thumb, 38 bytes, Stack size 16 bytes, bkp.o(i.set_bkp_mask))
<BR><BR>[Stack]<UL><LI>Max Depth = 40<LI>Call Chain = set_bkp_mask &rArr; write_backup_register_std &rArr; RTC_WriteBackupRegister
</UL>
<BR>[Calls]<UL><LI><a href="#[be]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;write_backup_register_std
</UL>
<BR>[Called By]<UL><LI><a href="#[b7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;set_w5500_ip
</UL>

<P><STRONG><a name="[b7]"></a>set_w5500_ip</STRONG> (Thumb, 494 bytes, Stack size 48 bytes, wizchip_conf.o(i.set_w5500_ip))
<BR><BR>[Stack]<UL><LI>Max Depth = 96<LI>Call Chain = set_w5500_ip &rArr; set_bkp_mac &rArr; write_backup_register_std &rArr; RTC_WriteBackupRegister
</UL>
<BR>[Calls]<UL><LI><a href="#[b5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;WIZCHIP_WRITE_BUF
<LI><a href="#[c4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;WIZCHIP_READ_BUF
<LI><a href="#[c2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;set_bkp_mask
<LI><a href="#[c1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;set_bkp_mac
<LI><a href="#[c0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;set_bkp_ip
<LI><a href="#[bf]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;set_bkp_gw
<LI><a href="#[bd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;set_bkp_dns
<LI><a href="#[ad]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;get_bkp_stat
<LI><a href="#[ac]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;get_bkp_mask
<LI><a href="#[ab]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;get_bkp_mac
<LI><a href="#[aa]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;get_bkp_ip
<LI><a href="#[a9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;get_bkp_gw
<LI><a href="#[a7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;get_bkp_dns
<LI><a href="#[9a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;delay_ms
<LI><a href="#[c3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memcpy
<LI><a href="#[8a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__2printf
</UL>
<BR>[Called By]<UL><LI><a href="#[5c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>

<P><STRONG><a name="[9d]"></a>socket</STRONG> (Thumb, 270 bytes, Stack size 32 bytes, socket.o(i.socket))
<BR><BR>[Stack]<UL><LI>Max Depth = 88<LI>Call Chain = socket &rArr; close &rArr; WIZCHIP_WRITE &rArr; IINCHIP_SpiSendData &rArr; SPI_SendByte
</UL>
<BR>[Calls]<UL><LI><a href="#[97]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;close
<LI><a href="#[8f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;WIZCHIP_WRITE
<LI><a href="#[8c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;WIZCHIP_READ
</UL>
<BR>[Called By]<UL><LI><a href="#[9c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;do_tcp_server
</UL>

<P><STRONG><a name="[b8]"></a>socket_buf_init</STRONG> (Thumb, 130 bytes, Stack size 40 bytes, w5500.o(i.socket_buf_init))
<BR><BR>[Stack]<UL><LI>Max Depth = 72<LI>Call Chain = socket_buf_init &rArr; WIZCHIP_WRITE &rArr; IINCHIP_SpiSendData &rArr; SPI_SendByte
</UL>
<BR>[Calls]<UL><LI><a href="#[8f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;WIZCHIP_WRITE
</UL>
<BR>[Called By]<UL><LI><a href="#[5c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>

<P><STRONG><a name="[b2]"></a>wiz_cs</STRONG> (Thumb, 48 bytes, Stack size 8 bytes, wizchip_conf.o(i.wiz_cs))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = wiz_cs
</UL>
<BR>[Calls]<UL><LI><a href="#[af]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GPIO_SetBits
<LI><a href="#[bb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GPIO_ResetBits
<LI><a href="#[80]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;delay_us
</UL>
<BR>[Called By]<UL><LI><a href="#[8e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;iinchip_cson
<LI><a href="#[8d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;iinchip_csoff
</UL>

<P><STRONG><a name="[ba]"></a>wiz_recv_data</STRONG> (Thumb, 104 bytes, Stack size 32 bytes, w5500.o(i.wiz_recv_data))
<BR><BR>[Stack]<UL><LI>Max Depth = 64<LI>Call Chain = wiz_recv_data &rArr; WIZCHIP_WRITE &rArr; IINCHIP_SpiSendData &rArr; SPI_SendByte
</UL>
<BR>[Calls]<UL><LI><a href="#[c4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;WIZCHIP_READ_BUF
<LI><a href="#[8f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;WIZCHIP_WRITE
<LI><a href="#[8c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;WIZCHIP_READ
</UL>
<BR>[Called By]<UL><LI><a href="#[a0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;recv
</UL>

<P><STRONG><a name="[bc]"></a>wiz_send_data</STRONG> (Thumb, 104 bytes, Stack size 32 bytes, w5500.o(i.wiz_send_data))
<BR><BR>[Stack]<UL><LI>Max Depth = 64<LI>Call Chain = wiz_send_data &rArr; WIZCHIP_WRITE &rArr; IINCHIP_SpiSendData &rArr; SPI_SendByte
</UL>
<BR>[Calls]<UL><LI><a href="#[b5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;WIZCHIP_WRITE_BUF
<LI><a href="#[8f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;WIZCHIP_WRITE
<LI><a href="#[8c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;WIZCHIP_READ
</UL>
<BR>[Called By]<UL><LI><a href="#[a1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;send
</UL>

<P><STRONG><a name="[60]"></a>wizchip_cris_enter</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, wizchip_conf.o(i.wizchip_cris_enter))
<BR>[Address Reference Count : 1]<UL><LI> wizchip_conf.o(.data)
</UL>
<P><STRONG><a name="[61]"></a>wizchip_cris_exit</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, wizchip_conf.o(i.wizchip_cris_exit))
<BR>[Address Reference Count : 1]<UL><LI> wizchip_conf.o(.data)
</UL>
<P><STRONG><a name="[63]"></a>wizchip_cs_deselect</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, wizchip_conf.o(i.wizchip_cs_deselect))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = wizchip_cs_deselect &rArr; iinchip_cson &rArr; wiz_cs
</UL>
<BR>[Calls]<UL><LI><a href="#[8e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;iinchip_cson
</UL>
<BR>[Address Reference Count : 1]<UL><LI> wizchip_conf.o(.data)
</UL>
<P><STRONG><a name="[62]"></a>wizchip_cs_select</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, wizchip_conf.o(i.wizchip_cs_select))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = wizchip_cs_select &rArr; iinchip_csoff &rArr; wiz_cs
</UL>
<BR>[Calls]<UL><LI><a href="#[8d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;iinchip_csoff
</UL>
<BR>[Address Reference Count : 1]<UL><LI> wizchip_conf.o(.data)
</UL>
<P><STRONG><a name="[64]"></a>wizchip_spi_readbyte</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, wizchip_conf.o(i.wizchip_spi_readbyte))
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = wizchip_spi_readbyte &rArr; IINCHIP_SpiSendData &rArr; SPI_SendByte
</UL>
<BR>[Calls]<UL><LI><a href="#[7c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IINCHIP_SpiSendData
</UL>
<BR>[Address Reference Count : 1]<UL><LI> wizchip_conf.o(.data)
</UL>
<P><STRONG><a name="[65]"></a>wizchip_spi_writebyte</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, wizchip_conf.o(i.wizchip_spi_writebyte))
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = wizchip_spi_writebyte &rArr; IINCHIP_SpiSendData &rArr; SPI_SendByte
</UL>
<BR>[Calls]<UL><LI><a href="#[7c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IINCHIP_SpiSendData
</UL>
<BR>[Address Reference Count : 1]<UL><LI> wizchip_conf.o(.data)
</UL>
<P><STRONG><a name="[be]"></a>write_backup_register_std</STRONG> (Thumb, 284 bytes, Stack size 16 bytes, bkp.o(i.write_backup_register_std))
<BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = write_backup_register_std &rArr; RTC_WriteBackupRegister
</UL>
<BR>[Calls]<UL><LI><a href="#[c5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RTC_WriteBackupRegister
<LI><a href="#[a2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;enable_backup_domain_access
</UL>
<BR>[Called By]<UL><LI><a href="#[c2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;set_bkp_mask
<LI><a href="#[c1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;set_bkp_mac
<LI><a href="#[c0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;set_bkp_ip
<LI><a href="#[bf]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;set_bkp_gw
<LI><a href="#[bd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;set_bkp_dns
</UL>
<P>
<H3>
Local Symbols
</H3>
<P><STRONG><a name="[82]"></a>SetSysClock</STRONG> (Thumb, 168 bytes, Stack size 12 bytes, system_stm32f4xx.o(i.SetSysClock))
<BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = SetSysClock
</UL>
<BR>[Called By]<UL><LI><a href="#[5d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SystemInit
</UL>

<P><STRONG><a name="[a2]"></a>enable_backup_domain_access</STRONG> (Thumb, 20 bytes, Stack size 8 bytes, bkp.o(i.enable_backup_domain_access))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = enable_backup_domain_access
</UL>
<BR>[Calls]<UL><LI><a href="#[84]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RCC_APB1PeriphClockCmd
<LI><a href="#[a3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;PWR_BackupAccessCmd
</UL>
<BR>[Called By]<UL><LI><a href="#[be]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;write_backup_register_std
</UL>

<P><STRONG><a name="[92]"></a>_fp_digits</STRONG> (Thumb, 366 bytes, Stack size 64 bytes, printfa.o(i._fp_digits), UNUSED)
<BR><BR>[Calls]<UL><LI><a href="#[68]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_uldivmod
<LI><a href="#[71]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_dmul
<LI><a href="#[72]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_ddiv
<LI><a href="#[6b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_dadd
<LI><a href="#[73]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_d2ulz
<LI><a href="#[93]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_cdrcmple
</UL>
<BR>[Called By]<UL><LI><a href="#[91]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_printf_core
</UL>

<P><STRONG><a name="[91]"></a>_printf_core</STRONG> (Thumb, 1744 bytes, Stack size 136 bytes, printfa.o(i._printf_core), UNUSED)
<BR><BR>[Calls]<UL><LI><a href="#[68]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_uldivmod
<LI><a href="#[96]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_uidivmod
<LI><a href="#[94]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_printf_pre_padding
<LI><a href="#[95]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_printf_post_padding
<LI><a href="#[92]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_fp_digits
</UL>
<BR>[Called By]<UL><LI><a href="#[90]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__0printf
</UL>

<P><STRONG><a name="[95]"></a>_printf_post_padding</STRONG> (Thumb, 36 bytes, Stack size 24 bytes, printfa.o(i._printf_post_padding), UNUSED)
<BR><BR>[Called By]<UL><LI><a href="#[91]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_printf_core
</UL>

<P><STRONG><a name="[94]"></a>_printf_pre_padding</STRONG> (Thumb, 46 bytes, Stack size 24 bytes, printfa.o(i._printf_pre_padding), UNUSED)
<BR><BR>[Called By]<UL><LI><a href="#[91]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_printf_core
</UL>
<P>
<H3>
Undefined Global Symbols
</H3><HR></body></html>
